Faster Technology LLC

08/05/2026

The FM-S14 supports either 1.8 or 2.5 volt signaling to ensure interoperability across a wide range of Spartan, Virtex, Kintex, Artix and other FPGA families.

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The FM-S14 is an FPGA Mezzanine Card (FMC) module that provides up to four SFP/SFP+ module interfaces directly into Multi-Gigabit Transceivers (MGTs) of an FPGA. The FM-S14 supports the industry standard Small Form-factor Pluggable (SFP/SFP+) transceiver module interface.

08/03/2026

Confirmed to run online!

August 10-12th:
High-Level Synthesis with the Unified IDE

Sept 21- Sept 25:
Designing with the AMD Adaptive SoC: Architecture and Methodology

Sept 28-Oct 1:
Designing with the Zynq UltraScale+ Online

07/31/2026

Confirmed to run online Sept 21-25th:

Designing with the AMD Versal Adaptive SoC: Architecture and Methodology

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Learn about the AMD Versal™ adaptive SoC architecture building blocks, such as Adaptable Engines, high-speed I/O, clocking, Scalar Engines, Intelligent Engines, and the programmable network on chip (NoC). Also learn how to use leading-edge memory and interfacing technologies to deliver powerful he...

07/29/2026

Confirmed to run August 10-12th:
High-Level Synthesis with the Unified IDE

This course provides a thorough introduction to high-level synthesis (HLS) using the AMD Vitis™ Unified IDE.
The focus of this course is on:
▪ Converting C/C++ designs into RTL implementations
▪ Learning the HLS component development flow
▪ Creating I/O interfaces for designs
▪ Applying different optimization techniques to designs
▪ Improving throughput, area, latency, and logic by using different HLS pragmas/directives
▪ Exporting IP that can be used with the Vivado™ IP catalog
▪ Migrating designs from the classic Vitis HLS tool to the Vitis Unified IDE

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Course Description This course provides a thorough introduction to high-level synthesis (HLS) using the AMD Vitis™ Unified IDE. The focus of this course is on: ▪ Converting C/C++ designs into RTL implementations ▪ Learning the HLS component development flow ▪ Creating I/O interfaces for desi...

07/27/2026

Confirmed to run online!

Sept 28-Oct 1:
Designing with the +

This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. This four-day LIVE Online Training (LOT) course is structured to provide FPGA HW, SW and system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.

More info:

Course Description This course provides an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family. This four-day LIVE Online Training (LOT) course is structured to provide FPGA HW, SW and system architects with an overview of the capabilities and support for the Zynq Ult...

07/24/2026

Ryzen AI Halo launches at Micro Center, powering agentic PCs for developers building larger, next-generation local AI applications.

07/22/2026

The FM-S28 provides two QSFP/QSFP+ module interfaces directly connected to the carrier card using the differential pairs of the FMC HPC connector. This enables a wide range of full data rate 40 Gigabit Ethernet, Fiber Channel, Infiniband and other very high performance serial standards to communicate with FPGA devices that have built in 10 Gigabit serial transceivers, such as the AMD Virtex-6 HXT family.

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Two QSFP/QSFP+ cages supports two (2) QSFP/QSFP+ transceiver modules enabling a wide range of transceivers with signaling rates up to 10Gb/sec per lane.

07/20/2026

Learn how AMD Vitis™ AI & AMD Vitis Video Analytics SDK (VVAS) use Gstreamer to build real-time Edge AI pipelines on AMD Versal™ AI Edge Series Gen 2.

07/15/2026

The FM-PLPC breaks out the complete LA bank of signals from the standard FMC Low Pin count Connector and the standard power rail and control signals. The user can add standard 0.1 inch spaced components and sockets for a wide variety of active and passive devices. The extended length version offers almost four times the prototype area of the standard length version to enable development of very complex capabilities. Standard control signals are available for the user to complete the interface to the chosen carrier card.

More details:

The FM-PLPC breaks out the complete LA bank of signals from the standard FMC Low Pin count Connector and the standard power rail and control signals. The user can add standard 0.1 inch spaced components and sockets for a wide variety of active and passive devices. The extended length version offers....

07/08/2026

Do you need assistance troubleshooting a project you're working on?

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We offer , where the instructor answers your specific questions.

Please contact us today to schedule a time to discuss your needs: [email protected]
https://www.fastertechnology.com/

Whether you are new to FPGAs or just new to AI, AMD and Faster Technology have training courses to bring you up to speed.