Cadence Design Systems Singapore

22/04/2026

In a new episode of Silicon Grapevine, Paul Cunningham, PhD, SVP and GM at Cadence, and EE Times - Electronic Engineering Times' Nitin Dahad discuss the future of the EDA industry: virtual engineers.
Paul and Nitin explore the transformative potential of agentic AI and LLMs in chip design, envisioning a future in which engineers collaborate with AI-driven super agents.
🎥 Discover how these autonomous systems will support your team by watching the full video https://www.eetimes.com/grapevine/virtual-engineers-the-future-of-eda/?utm_source=FB&utm_medium=social&utm_campaign=eetimes_virtual_engineers

In a new episode of Silicon Grapevine, Paul Cunningham, PhD, SVP and GM at Cadence, and EE Times - Electronic Engineering Times' Nitin Dahad discuss the future of the EDA industry: virtual engineers.

Paul and Nitin explore the transformative potential of agentic AI and LLMs in chip design, envisioning a future in which engineers collaborate with AI-driven super agents.

🎥 Discover how these autonomous systems will support your team by watching the full video: https://ow.ly/f1y650YC0se

20/04/2026

🌟 Big news from 2026!
Cadence is leading the charge in advancing engineering for the AI era. With NVIDIA supporting our innovations, we’re delivering:
⚡️ Agentic engineering flows to transform semiconductor design.
⚡️ Embedded agentic AI to power physical AI systems.
⚡️ Digital twins to design and optimize efficient AI factories.
Our collaboration with NVIDIA combines Cadence’s leadership in agentic AI, EDA, and SDA with NVIDIA’s breakthroughs in accelerated computing, enabling customers to innovate faster and more confidently.
👉 Learn more about how Cadence is shaping the future of engineering:https://www.cadence.com/en_US/home/company/newsroom/press-releases/pr/2026/cadence-and-nvidia-expand-partnership-to-reinvent-engineering.html

🌟 Big news from 2026!

Cadence is leading the charge in advancing engineering for the AI era. With NVIDIA supporting our innovations, we’re delivering:

⚡️ Agentic engineering flows to transform semiconductor design.
⚡️ Embedded agentic AI to power physical AI systems.
⚡️ Digital twins to design and optimize efficient AI factories.

Our collaboration with NVIDIA combines Cadence’s leadership in agentic AI, EDA, and SDA with NVIDIA’s breakthroughs in accelerated computing, enabling customers to innovate faster and more confidently.

👉 Learn more about how Cadence is shaping the future of engineering: https://ow.ly/uQk750YKapf

16/04/2026

In this CadenceLIVE 2026 video, TSMC’s Aveek Sarkar, Director of Ecosystem and Alliance Management Division, highlights their long-standing partnership with Cadence in accelerating semiconductor technology. 🚀
Advancing silicon for AI, high-performance computing, and automotive requires a foundation of innovation and validated design solutions. Together, we’re helping customers achieve better energy efficiency and performance with advanced SoC, chiplet, and 3D-IC architectures.
Key highlights include faster time to market and higher design confidence with certified design flows, leading-edge IP like UCIe and HBM4, and AI-driven design automation. ⚡️

16/04/2026

Cadence President and CEO Anirudh Devgan and NVIDIA Founder and CEO Jensen Huang shared the stage for an incredible fireside chat at in front 1000+ customers, partners and engineers! 🚀

16/04/2026

Exciting news: Cadence is collaborating with Google to drive agentic AI-powered chip design! 🚀
Cadence ChipStack AI Super Agent is now integrated with Gemini on Google Cloud, uniting advanced AI and EDA for smarter chip design.
See key benefits for engineering teams:
⚡️ Up to 10X boost in productivity
⚡️ Streamlined verification and debug
⚡️ Faster development cycles
Learn more in our full press release: https://www.cadence.com/en_US/home/company/newsroom/press-releases/pr/2026/cadence-and-google-collaborate-to-scale-ai-driven-chip-design.html

14/04/2026

AI is redefining data center strategy.
Rising power densities, tighter resource constraints, and increasing regulatory pressure are forcing a shift in how facilities are designed and operated.
The key question for leaders: How do you scale AI infrastructure without scaling cost and risk?
Our ebook explores what it takes to build an AI-optimized data center:
• Managing extreme power and cooling demands
• Reducing stranded capacity
• Leveraging digital twins to de-risk decisions
• Using AI to improve efficiency and resilience
📘 Download the ebook: https://www5.cadence.com/impact_ai_datacenters_ebook.html?utm_source=socialmedia&utm_medium=gif&utm_campaign=DataCenter_Impact_AI_ebook
How are you preparing your data center strategy for AI?

Download our free ebook and discover how AI, liquid cooling, and digital twins are shaping next-generation data centers.

08/04/2026

The future of AI is unfolding—are you ready? 🤖
🎥 Last year at 2025, Anirudh Devgan shared his vision of the multiple phases of AI and how they’re revolutionizing industries.
This year, he’s taking it to the next level. On April 15, join us at Silicon Valley 2026 for his highly anticipated keynote, where he’ll reveal what’s next for AI and innovation.
💡 Don’t miss out—secure your spot and be part of the future.
https://events.cadence.com/event/CadenceLIVESV2026/summary?RefId=SM_CAD

02/04/2026

Neurophos is pushing optical computing into the future. By shrinking the optical transistor by 10,000X and boosting compute density and energy efficiency, they’re bringing photonic chips closer to mainstream adoption.
Using Cadence's advanced electronic and photonic design platforms for simulation, layout, verification, and power‑delivery analysis, Neurophos is accelerating toward a commercially viable solution by 2028.
Learn more about how they’re reinventing computing with light: https://community.cadence.com/cadence_blogs_8/b/corporate-news/posts/reinventing-optical-computing-neurophos-breakthrough-in-photonic-transistors?utm_source=Facebook&utm_medium=social-media&utm_campaign=DwC&utm_term=blog

30/03/2026

As AI and massive data demands push hardware to its limits, photonic integrated circuits offer a high-bandwidth, energy-efficient solution, but require advanced tools for co-design.
Spectre Photonics extends the trusted Spectre Simulation platform, addressing the complexity of electronic-photonic co-design by merging electrical and photonic simulation into a single, cohesive engine.
Check out the key features here:https://community.cadence.com/cadence_blogs_8/b/cic/posts/unifying-electronic-and-photonic-circuit-simulation?

19/03/2026

Engineering demand is accelerating faster than human teams can scale. Cadence agentic AI offers a solution: a virtual engineering organization that extends human expertise to tackle the scale and complexity of modern chip design.
The Cadence ChipStack AI Super Agent transforms design and verification with AI-driven workflows that coordinate reasoning, context, and ex*****on to deliver trusted, scalable silicon outcomes.
Learn how Cadence and NVIDIA are shaping the future of chip design with agentic AI.

A virtual engineering organization coordinates reasoning and intent across design and verification, while accelerated, AI‑driven EDA tools—and working with NVIDIA—translate that intelligence into trusted, scalable silicon outcomes. Engin...

09/03/2026

AI-Accelerated Design: From Hyperscale Data Centers to Molecular Discovery 💡

Join Rob Knoth, Senior Group Director, Strategy & New Ventures at Cadence, as he dives into how GPU computing and agentic AI are driving continuous innovation across semiconductors, systems, and molecular sciences.

📅 Date: March 16, 2026
⏰ Time: 4:00 PM - 4:15 PM PT

Discover how Cadence and NVIDIA are shaping a unified AI design ecosystem to tackle the hardest problems in engineering and science.

📖 Read the blog to learn more: https://ow.ly/N54K50YnhZs

Don’t miss this must-attend session!

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05/03/2026

Chiplets are redefining how advanced systems get built, especially for physical AI, where power, latency, safety, and software predictability are non-negotiable. The path forward is modular, standards-based, and designed for reuse.
In this short video, Cadence VP David Glasco explains how we help customers:
🔶 Accelerate with our silicon-proven Chiplet Framework and reference platforms
🔶 Start software earlier and validate interoperability sooner
🔶 Design with security in mind, from boot to lifecycle
🔶 Scale product families with the 4 Cs: cost efficiency, configurability, customization, and the Cadence Technology Ecosystem
See how our Cadence Chiplet Solutions enable faster time to market with less risk.
Watch the full video now: https://ow.ly/NYVv50YlGC5
Explore more resources:
eBook: Helping You Realize Your Chiplet Ambitions
https://ow.ly/RY4c50YlGC6