Sofics Als Vlaamse KMO ontwerpen, testen en patenteren we elektronische circuits om de ICs van onze internationale klanten te beschermen tegen ESD.

We look forward to seeing you at the Samsung Foundry SFF event on October 18 in Tokyo. Meet Bart Keppens and members fro...
10/10/2022

We look forward to seeing you at the Samsung Foundry SFF event on October 18 in Tokyo. Meet Bart Keppens and members from IPN, our local sales representation at our booth to find out how our silicon proven ESD solutions on Samsung 4nm, 5nm, 8nm and 14nm can benefit your next IC design.

Register here: https://semiconductor.samsung.com/event/foundry-events-2022-japan/

📢 We are happy to announce a new partnership with Kitec Design 📢The Kitec Design team will help to connect Sofics to fab...
01/09/2022

📢 We are happy to announce a new partnership with Kitec Design 📢

The Kitec Design team will help to connect Sofics to fabless design companies in South-Korea. We look forward working with Yong Ho ON and his colleagues to ensure IC designers in Korea can also enjoy the benefits of Sofics’ semiconductor IP solutions.

📽 Video 📽A growing number of semiconductor applications are turning to 2.5D and 3D integration. Integrating multiple die...
19/08/2022

📽 Video 📽

A growing number of semiconductor applications are turning to 2.5D and 3D integration. Integrating multiple dies in a single package can reduce total power consumption, reduce required PCB area, enhance performance and it can speed up development cycles.

It is important to consider Electrostatic Discharge (ESD) protection early in the design phase because hybrid integration introduces new ESD challenges but also opportunities for area saving.

Read more: http://monthly-pulse.com/2021/02/12/esd-protection-for-2-5d-and-3d-packages/



https://vimeo.com/sofics/esdprotectionor25and3dchips

A growing number of semiconductor applications are turning to 2.5D and 3D integration. Integrating multiple dies in a single package can reduce total power consumption,…

📽 Video 📽Integrated circuits (IC) used in medical applications require special attention for ESD protection. Besides the...
17/08/2022

📽 Video 📽

Integrated circuits (IC) used in medical applications require special attention for ESD protection. Besides the higher likelihood and high impact a third aspect also requires attention. In several medical applications the IC designers cannot rely on the conventional ESD protection concepts.

Sofics engineers have supported several medical applications for our customers.

Read about a few cases: http://monthly-pulse.com/2021/01/14/challenges-for-ic-design-in-medical-applications/



https://vimeo.com/sofics/3keychallengesinmedicalicdesign

Integrated circuits (IC) used in medical applications require special attention for ESD protection. It is important to perform a risk analysis. An IC failure can…

📽 Video 📽Various electronics applications require low power consumption. In this short movie we benchmark Sofics solutio...
04/08/2022

📽 Video 📽

Various electronics applications require low power consumption. In this short movie we benchmark Sofics solutions versus the foundry solutions.

Data is presented for 3 generations of FinFET and one FDSOI process. Leakage measurements, both at room temperature and elevated (125°C) temperature, show an improvement of 2..3 orders of magnitude.

https://vimeo.com/sofics/ff-fdsoi-leakage

Various FinFET and FDSOI applications require a leakage consumption of (power) clamps that is much lower than the standard PDK ESD solutions. In this short movie…

📽 Video 📽Can you integrate Transient Voltage Suppressor (TSV) circuits on-chip? Can you protect chips against IEC61000-4...
28/07/2022

📽 Video 📽

Can you integrate Transient Voltage Suppressor (TSV) circuits on-chip? Can you protect chips against IEC61000-4-2?

Despite the fact that IEC 61000-4-2 is a standard created for system level ESD stress it is frequently used for standalone integrated circuits.

This video discusses the main questions (what, why, how) and discusses the key aspects to consider.

https://vimeo.com/sofics/applyingsystemlevelesd

More details are available in the article: https://monthly-pulse.com/2021/06/22/applying-system-level-esd-iec-61000-4-2-stress-on-ics/

Despite the fact that IEC 61000-4-2 is a standard created for system level ESD stress it is frequently used for standalone integrated circuits. This video discusses…

13/07/2022

📽 Video 📽

Learn about CDM (ESD) protection for and in just a few minutes

ESD protection clamps, also in FinFET and FDSOI technology must trigger fast enough in order to cope with CDM (Charged Device Model) stress events. In this short movie, we address trigger speed analysis for Sofics’ ESD solutions in these technologies. We explain the measurement analysis techniques and show the results.

More background: http://monthly-pulse.com/2021/03/09/cdm-robustness-of-scr-protection-devices/

06/07/2022

📽 Video 📽

Internet of Things is everywhere. Chip designers face 3 challenges related to on-chip ESD protection.

Our customers have created amazing products in the IoT domain including indoor with 10 year battery lifetime, low power /NFC devices, implanted devices to restore hearing, wearables, smart home and industry 4.0 sensor applications.

More background: https://monthly-pulse.com/2021/07/14/esd-protection-for-internet-of-things-iot/

📣 New Blog Post 📣Due to the semiconductor shortage in 2021 everyone realized that cars these days integrate a lot of ele...
01/07/2022

📣 New Blog Post 📣

Due to the semiconductor shortage in 2021 everyone realized that cars these days integrate a lot of electronics.
The average number of computer chips per car has increased a lot in the last decade.
It is clear that the new applications require high-speed interconnects that are not possible with the initial, low-speed interface types.
But there is also innovation possible for the old interface types like LIN/CAN by combining these together with other IP blocks on a single die.

https://monthly-pulse.com/2022/07/01/new-opportunities-for-automotive-lin-interfaces/

23/06/2022

👩👩‍🦰👩‍🦱 Women in Engineering Day 🎉🎉🎉

Women are often under-represented in the academic and professional fields of engineering, however many have contributed to the diverse fields of engineering historically and currently.

Today we celebrate women in engineering by putting one of our engineers in the spotlight.

Adres

Sint-Godelievestraat 32
Aalterburg
9880

Meldingen

Wees de eerste die het weet en laat ons u een e-mail sturen wanneer Sofics nieuws en promoties plaatst. Uw e-mailadres wordt niet voor andere doeleinden gebruikt en u kunt zich op elk gewenst moment afmelden.

Contact

Stuur een bericht naar Sofics:

Delen