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SZ Hun Tian Ling Technology CO., LTD, 福田区深南中路3009号福田大厦, Shenzhen (2026)

Name: SZ Hun Tian Ling Technology CO., LTD
Address: 福田区深南中路3009号福田大厦, Shenzhen, 518000, CN
Telephone: +8617665480886
Price range: $$$$

13/12/2022

NXP Semiconductors S912XEP100BMAL

The MC9S12XE-Family of micro controllers is a further development of the S12XD-Family including new features for enhanced system integrity and greater functionality. These new features include a Memory Protection Unit (MPU) and Error Correction Code (ECC) on the Flash memory together with enhanced EEPROM functionality (EEE), an enhanced XGATE, an Internally filtered, frequency modulated Phase Locked Loop (IPLL) and an enhanced ATD. The E-Family extends the S12X product range up to 1MB of Flash memory with increased I/O capability in the 208-pin version of the flagship MC9S12XE100. The MC9S12XE-Family delivers 32-bit performance with all the advantages and efficiencies of a 16 bit MCU. It retains the low cost, power consumption, EMC and code-size efficiency advantages currently enjoyed by users of Freescale’s existing 16-Bit MC9S12 and S12X MCU families. There is a high level of compatibility between the S12XE and S12XD families. The MC9S12XE-Family features an enhanced version of the performance-boosting XGATE co-processor which is programmable in “C” language and runs at twice the bus frequency of the S12X with an instruction set optimized for data movement, logic and bit manipulation instructions and which can service any peripheral module on the device. The new enhanced version has improved interrupt handling capability and is fully compatible with the existing XGATE module. The MC9S12XE-Family is composed of standard on-chip peripherals including up to 64Kbytes of RAM, eight asynchronous serial communications interfaces (SCI), three serial peripheral interfaces (SPI), an 8- channel IC/OC enhanced capture timer (ECT), two 16-channel, 12-bit analog-to-digital converters, an 8- channel pulse-width modulator (PWM), five CAN 2.0 A, B software compatible modules (MSCAN12), two inter-IC bus blocks (IIC), an 8-channel 24-bit periodic interrupt timer (PIT) and an 8-channel 16-bit standard timer module (TIM). The MC9S12XE-Family uses 16-bit wide accesses without wait states for all peripherals and memories. The non-multiplexed expanded bus interface available on the 144/208-Pin versions allows an easy interface to external memories. In addition to the I/O ports available in each module, up to 26 further I/O ports are available with interrupt capability allowing Wake-Up from STOP or WAIT modes. The MC9S12XE-Family is available in 208- Pin MAPBGA, 144-Pin LQFP, 112-Pin LQFP or 80-Pin QFP options.

13/12/2022

Texas Instruments TMS320F28335PGFA

• High-performance static CMOS technology – Up to 150 MHz (6.67-ns cycle time) – 1.9-V/1.8-V core, 3.3-V I/O design • High-performance 32-bit CPU (TMS320C28x) – IEEE 754 single-precision Floating-Point Unit (FPU) (F2833x only) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ and Assembly) • Six-channel DMA controller (for ADC, McBSP, ePWM, XINTF, and SARAM) • 16-bit or 32-bit External Interface (XINTF) – More than 2M × 16 address reach • On-chip memory – F28335, F28333, F28235: 256K × 16 flash, 34K × 16 SARAM – F28334, F28234: 128K × 16 flash, 34K × 16 SARAM – F28332, F28232: 64K × 16 flash, 26K × 16 SARAM – 1K × 16 OTP ROM • Boot ROM (8K × 16) – With software boot modes (through SCI, SPI, CAN, I2C, McBSP, XINTF, and parallel I/O) – Standard math tables • Clock and system control – On-chip oscillator – Watchdog timer module • GPIO0 to GPIO63 pins can be connected to one of the eight external core interrupts • Peripheral Interrupt Expansion (PIE) block that supports all 58 peripheral interrupts • 128-bit security key/lock – Protects flash/OTP/RAM blocks – Prevents firmware reverse-engineering • Enhanced control peripherals – Up to 18 PWM outputs – Up to 6 HRPWM outputs with 150-ps MEP resolution – Up to 6 event capture inputs – Up to 2 Quadrature Encoder interfaces – Up to 8 32-bit timers (6 for eCAPs and 2 for eQEPs) – Up to 9 16-bit timers (6 for ePWMs and 3 XINTCTRs) • Three 32-bit CPU timers • Serial port peripherals – Up to 2 CAN modules – Up to 3 SCI (UART) modules – Up to 2 McBSP modules (configurable as SPI) – One SPI module – One Inter-Integrated Circuit (I2C) bus • 12-bit ADC, 16 channels – 80-ns conversion rate – 2 × 8 channel input multiplexer – Two sample-and-hold – Single/simultaneous conversions – Internal or external reference • Up to 88 individually programmable, multiplexed GPIO pins with input filtering • JTAG boundary scan support – IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture • Advanced debug features – Analysis and breakpoint functions – Real-time debug using hardware • Development support includes – ANSI C/C++ compiler/assembler/linker – Code Composer Studio™ IDE – DSP/BIOS™ and SYS/BIOS – Digital motor control and digital power software libraries • Low-power modes and power savings – IDLE, STANDBY, HALT modes supported – Disable individual peripheral clocks • Endianness: Little endian • Package options: – Lead-free, green packaging – 176-ball plastic Ball Grid Array (BGA) [ZJZ] – 179-ball MicroStar BGA™ [ZHH] – 179-ball New Fine Pitch Ball Grid Array (nFBGA) [ZAY] – 176-pin Low-Profile Quad Flatpack (LQFP) [PGF] – 176-pin Thermally Enhanced Low-Profile Quad Flatpack (HLQFP) [PTP] • Temperature options: – A: –40°C to 85°C (PGF, ZHH, ZAY, ZJZ) – S: –40°C to 125°C (PTP, ZJZ) – Q: –40°C to 125°C (PTP, ZJZ) (AEC Q100 qualification for automotive applications)

12/12/2022

NXP Semiconductors MCIMX6U8DVM10AC

The i.MX 6Solo/6DualLite processors represent the latest achievement in integrated multimedia-focused products offering high performance processing with lower cost, as well as optimization for low power consumption. The processors feature advanced implementation of single/dual Arm® Cortex®-A9 core, which operates at speeds of up to 1 GHz. They include 2D and 3D graphics processors, 1080p video processing, and integrated power management. Each processor provides a 32/64-bit DDR3/DDR3L/LPDDR2-800 memory interface and a number of other interfaces for connecting peripherals, such as WLAN, Bluetooth®, GPS, hard drive, displays, and camera sensors. The i.MX 6Solo/6DualLite processors are specifically useful for applications such as: • Web and multimedia tablets • Web and multimedia tablets• Color eReaders • IPTV • Human Machine Interfaces (HMI) • Portable medical • IP phones • Home energy management systems The i.MX 6Solo/6DualLite applications processors feature: • Applications processors—The processors enhance the capabilities of high-tier portable applications by fulfilling the ever increasing MIPS requirements of operating systems and games. The Dynamic Voltage and Frequency Scaling (DVFS) provides significant power reduction, allowing the device to run at lower voltage and frequency with sufficient MIPS for tasks, such as audio decode. • Multilevel memory system—The multilevel memory system of each processor is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processors support many types of external memory devices, including DDR3, DDR3L, LPDDR2, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND™, and managed NAND, including eMMC up to rev 4.4/4.41. • Smart speed technology—The processors have power management throughout the IC that enables the rich suite of multimedia features and peripherals to consume minimum power in both active and various low power modes. Smart speed technology enables the designer to deliver a feature-rich product, requiring levels of power far lower than industry expectations. • Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices by scaling the voltage and frequency to optimize performance. • Multimedia powerhouse—The multimedia performance of each processor is enhanced by a multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a multi-standard hardware video codec, an image processing unit (IPU), a programmable smart DMA (SDMA) controller, and an asynchronous sample rate converter. • Powerful graphics acceleration—Each processor provides two independent, integrated graphics processing units: an OpenGL® ES 2.0 3D graphics accelerator with a shader and a 2D graphics accelerator. • Interface flexibility—Each processor supports connections to a varietysoftware downloads. The security features are discussed in detail in the i.MX 6Solo/6DualLite Security Reference Manual (IMX6DQ6SDLSRM). • Integrated power management—The processors integrate linear regulators and internally generate voltage levels for different domains. This significantly simplifies system power management structure.

12/12/2022

NXP Semiconductors MCF52259CAG80

The MCF52259 microcontroller family (MCF52252, MCF52254, MCF52255, MCF52256, MCF52258, and MCF52259 devices) is a member of the ColdFire family of reduced instruction set computing (RISC) microprocessors. This document provides an overview of the 32-bit MCF52259 microcontroller, focusing on its highly integrated and diverse feature set. This 32-bit device is based on the Version 2 ColdFire core operating at a frequency up to 80 MHz, offering high performance and low power consumption. On-chip memories connected tightly to the processor core include up to 512 KB of flash memory and 64 KB of static random access memory (SRAM). On-chip modules include: • V2 ColdFire core delivering 76 MIPS (Dhrystone 2.1) at 80 MHz running from internal flash memory with Enhanced Multiply Accumulate (MAC) Unit and hardware divider • Cryptography Acceleration Unit (CAU). • Fast Ethernet controller (FEC) • Mini-FlexBus external bus interface available on 144 pin packages • Universal Serial Bus On-The-Go (USBOTG) • USB Transceiver • FlexCAN controller area network (CAN) module • Three universal asynchronous/synchronous receiver/transmitters (UARTs) • Two inter-integrated circuit (I2C) bus interface modules • Queued serial peripheral interface (QSPI) module • Eight-channel 12-bit fast analog-to-digital converter (ADC) with simultaneous sampling • Four-channel direct memory access (DMA) controller • Four 32-bit input capture/output compare timers with DMA support (DTIM) • Four-channel general-purpose timer (GPT) capable of input capture/output compare, pulse width modulation(PWM), pulse-code modulation (PCM), and pulse accumulation • Eight-channel/Four-channel, 8-bit/16-bit pulse width modulation timer • Two 16-bit periodic interrupt timers (PITs) • Real-time clock (RTC) module with 32 kHz crystal • Programmable software watchdog timer • Secondary watchdog timer with independent clock • Interrupt controller capable of handling 57 sources • Clock module with 8 MHz on-chip relaxation oscillator and integrated phase-locked loop (PLL) • Test access/debug port (JTAG, BDM)

12/12/2022

NXP Semiconductors MC33978AESR2

The 33978 is designed to detect the closing and opening of up to 22 switch contacts. The switch status, either open or closed, is transferred to the microprocessor unit (MCU) through a serial peripheral interface (SPI). This SMARTMOS device also features a 24-to-1 analog multiplexer for reading the input channels as analog inputs. The analog selected input signal is buffered and provided on the AMUX output pin for the MCU to read. Independent programmable wetting currents are available as needed for the application. A battery and temperature monitor are included in the IC and available via the AMUX pin. The 33978 device has two modes of operation, Normal and Low-power mode (LPM). Normal mode allows programming of the device and supplies switch contacts with pull-up or pull-down current as it monitors the change of state on the switches. The LPM provides low quiescent current, which makes the 33978 ideal for automotive and industrial products requiring low sleep-state currents.
ideal for automotive and industrial products requiring low sleep-state currents. Features • Fully functional operation 4.5 V ≤ VBATP ≤ 36 V • Full parametric operation 6.0 V ≤ VBATP ≤ 28 V • Operating switch input voltage range from -1.0 V to 36 V • Eight programmable inputs (switches to battery or ground) • 14 switch-to-ground inputs • Selectable wetting current (2, 6, 8, 10, 12, 14, 16, or 20 mA) • Interfaces directly to an MCU using 3.3 V / 5.0 V SPI protocol • Selectable wake-up on change of state • Typical standby current IBATP = 30 μA and IDDQ = 10 μA • Active interrupt (INT_B) on change-of-switch state • Integrated battery and temperature sensing Figure 1. 33978 simplified application diagram Notes 1. The IC is functional from 4.5 V < VBATP < 6.0 V, but with degraded parametric values. The parameters may not meet the minimum and maximum specifications when VBATP drops below 6.0 V. MULTIPLE SWITCH DETECTION INTERFACE 33978 34978 Applications • Automotive • Heating ventilation and air conditioning (HVAAC) • Lighting • Central gateway/in-vehicle networking • Gasoline engine management • Industrial • Programmable logic control (PLC) • Process control, temperature control • Input-output control (I/O Control) • Single board computer • Ethernet switch

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福田区深南中路3009号福田大厦
Shenzhen
518000

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+8617665480886

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